Keynote: Dr. Seungwook Yoon

Dr. YOON is currently working as Corporate VP/Head of Team of Package Technology Strategy and Planning, Samsung Electronics.

Prior to joining Samsung, He was director of group technology strategy, STATS ChipPAC, JCET Group. He also worked deputy lab director of MMC (Microsystem, Module and Components) lab, IME (Institute of Microelectronics), A*STAR, Singapore. YOON received Ph.D degree in Materials Science and Engineering from KAIST, Korea. He also holds MBA degree from Nanyang Business School, Singapore. He has over 300 journal papers, conference papers and trade journal papers, and over 20 US patents on microelectronic materials and electronic packaging. Served as technical committee member of various international packaging technology conferences, EPTC, ESTC, iMAPS, IWLPC and SEMI.

Advanced Package FAB Solutions (APFS) for Chiplet Integration of Emerging Applications

Samsung’s Advanced Package FAB solutions provide complementary and etended PKG platforms including Fanout Package, TSV, 2.5D, 3D as well as 3D SiP.

Currently higher computing power and memory bandwidth are the major requirements of AI and GPU, accelerators and network devices. And the on-going increase in profrmance requiremtns from Cloud to Edge to on-premise use cases requre tighter coupling of compute, memory and storgae resources. So memory coherency and low laterncy attributes across converged compute infrastructure with interconnect technologies including UCLe (Universal Chiplet Interconnect Express) and CXL (Compute Express Link).

These demands lead to the adopioin of advanced wafer level packging solutions to increase bandwidth desnity, thermal performance and to improve electrical perforance with shorter interconnection with th hybrid Cu bonding (HCB) or fine pitch imcrobump bonding.

In this presentation, the APFS are to be introduced and discussed in terms of challenges and opportunites for emerging high-end computing, memory and mobile platforms.